{
    "@odata.type": "#Processor.v1_20_1.Processor",
    "Id": "FPGA1",
    "Name": "FPGA",
    "ProcessorType": "FPGA",
    "ProcessorArchitecture": "OEM",
    "InstructionSet": "OEM",
    "Manufacturer": "Intel(R) Corporation",
    "Model": "Stratix 10",
    "UUID": "00000000-0000-0000-0000-000000000000",
    "Status": {
        "State": "Enabled",
        "Health": "OK"
    },
    "Metrics": {
        "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/ProcessorMetrics"
    },
    "TDPWatts": 120,
    "MaxTDPWatts": 150,
    "ProcessorMemory": [
        {
            "IntegratedMemory": true,
            "MemoryType": "HBM2",
            "CapacityMiB": 512,
            "SpeedMHz": 1066
        }
    ],
    "FPGA": {
        "FpgaType": "Discrete",
        "Model": "Stratix10",
        "FirmwareId": "0x6400002fc614bb9",
        "FirmwareManufacturer": "Intel(R) Corporation",
        "FirmwareVersion": "Blue v.1.00.86",
        "HostInterface": {
            "InterfaceType": "PCIe",
            "PCIe": {
                "MaxPCIeType": "Gen4",
                "MaxLanes": 8
            }
        },
        "ExternalInterfaces": [
            {
                "InterfaceType": "Ethernet",
                "Ethernet": {
                    "MaxSpeedMbps": 10240,
                    "MaxLanes": 4
                }
            }
        ],
        "PCIeVirtualFunctions": 1,
        "ProgrammableFromHost": true,
        "ReconfigurationSlots": [
            {
                "SlotId": "AFU0",
                "UUID": "00000000-0000-0000-0000-000000000000",
                "ProgrammableFromHost": true,
                "AccelerationFunction": {
                    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/AccelerationFunctions/Compression"
                }
            }
        ]
    },
    "AccelerationFunctions": {
        "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/AccelerationFunctions"
    },
    "Links": {
        "Endpoints": [],
        "ConnectedProcessors": [
            {
                "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/CPU1"
            }
        ]
    },
    "Actions": {
        "#Processor.Reset": {
            "target": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1/Actions/Processor.Reset"
        }
    },
    "@odata.id": "/redfish/v1/Systems/437XR1138R2/Processors/FPGA1",
    "@Redfish.Copyright": "Copyright 2014-2023 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright."
}